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EDA-設(shè)計(jì)彩燈控制器

設(shè)計(jì)彩燈控制器要求 1、8個(gè)燈全亮； 2、8個(gè)燈全滅； 3、從左到右第一個(gè)開(kāi)始每隔一個(gè)亮； 4、從右到左第一個(gè)開(kāi)始每隔一個(gè)滅； 5、左四個(gè)滅，右四個(gè)亮； 6、左四個(gè)亮，右四個(gè)滅；要vhdl源碼: 問(wèn) 提問(wèn)者：網(wǎng)友 | 2018-07-18

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程序如下： LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CDKZ IS PORT(CLK,CLR:IN STD_LOGIC; --時(shí)鐘和復(fù)位-- COUT:OUT STD_LOGIC_VECTOR(7 DOWNTO 0)); --輸出-- END; ARCHITECTURE BVE OF CDKZ IS TYPE STATE_DDRAM IS --定義狀態(tài)機(jī)-- (READY, ONE, TWO, THREE, FOUR, FIVE, SIX); SIGNAL STATE,NEXT_STATE:STATE_DDRAM; SIGNAL CNT8:STD_LOGIC_VECTOR(5 DOWNTO 0); --計(jì)數(shù)信號(hào)--- SIGNAL C_T:STD_LOGIC_VECTOR(7 DOWNTO 0); BEGIN P1:PROCESS(CLR,CLK) BEGIN IF CLR='1' THEN STATE<=READY; ELSIF CLK'EVENT AND CLK='1' THEN STATE<=NEXT_STATE;CNT8<=CNT8+1; --雙線狀態(tài)機(jī)運(yùn)行方式，計(jì)數(shù)器到上升沿加1--- END IF; END PROCESS P1; STATE_COM:PROCESS(STATE,NEXT_STATE,CNT8)---狀態(tài)機(jī)的轉(zhuǎn)向--- BEGIN CASE STATE IS WHEN READY=>NEXT_STATE<=ONE; ---開(kāi)始--- WHEN ONE=>NEXT_STATE<=TWO; IF CNT8<"000111" THEN C_T<="11111111";END IF;---8個(gè)燈全亮--- WHEN TWO=>NEXT_STATE<=THREE; IF (CNT8>"000111")AND(CNT8<"001111") THEN C_T<="00000000";END IF;--8個(gè)燈全滅-- WHEN THREE=>NEXT_STATE<=FOUR; IF CNT8="010000" THEN C_T<="10000000";END IF; IF CNT8="010001" THEN C_T<="01000000";END IF; IF CNT8="0: 回答者：網(wǎng)友

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